module AddressLatchDecoder(CFClock, CardEnabled, OE, WE, IORD, IOWR, AddressLatch);

input CFClock;                                                //200 MHz Free Running Clock
input CardEnabled;                                            //CE1 or CE2 is Low
input OE;                                                     //Memory Read
input WE;                                                     //Memory Write
input IORD;                                                   //IO Read
input IOWR;                                                   //IO Write

output AddressLatch;                                          //Address Latch

wire CEPulse;                                                 //Pulsed on the beginning of a card access
wire TransferPulse;                                           //Pulsed on the beginning of a transfer

wire Transfer = (~OE) || (~WE) || (~IORD) || (~IOWR);

PulseGen TransferPulseGen(.Clock(CFClock), .In(Transfer), .Out(TransferPulse));
PulseGen CEPulseGen(.Clock(CFClock), .In(CardEnabled), .Out(CEPulse));

assign AddressLatch = ((TransferPulse) || (CEPulse));

endmodule
